Semiconductor manufacturing is limited by the lithography process, which prints increasingly finer circuit patterns. In turn, the lithography process is driven by two technologies: wafer lithography equipment and computational lithography. Historically, wafer lithography and computational lithography have been separate and independent processes, each attempting to optimize the lithography process to produce finer circuit patterns.
In the current generation of microelectronics it has become increasingly more difficult to produce finer circuit patterns. For example, feature size, line width, and the separation between features and lines are becoming increasingly smaller and more difficult to produce in newer generation technologies, e.g., 45 nm technologies. One of the fundamental reasons for these difficulties is that imaging of integrated circuit (IC) patterns has become prone to optical proximity effects (OPEs) modifying the images in a interdependent manner where any pattern interacts with imaging of its neighbors. To keep up with the need for such finer circuit patterns, Optical Proximity Corrections (OPC) processes have been used to improve image fidelity. The goal of the OPC is to correct OPEs, which cause deterioration of image fidelity of patterns used in IC manufacture. However, the accuracy of OPC models have not kept pace with the requirements for finer circuit patterns, leading to higher manufacturing costs, increased time to market and decreased quality in manufacturing. Basically, the OPC models used thus far are incomplete because they do not include all the factors impacting OPEs.
Basically, the OPC process is governed by a set of optical rules, a set of modeling principles or a hybrid combination of rule-based OPC and model-based OPC. In general, current OPC techniques involve setting up an OPC software program with accompanying OPC scripts to produce OPC rules for rule-based OPC, or OPC models for model-based OPC. The OPC program carries out computer corrections of initial data set with information relating to the desired pattern and manipulates the data set to arrive at a corrected data set. This data set is then used to design a reticle used to manufacture the circuit patterns on a wafer.
However, manipulating the data to arrive at a corrected data set is a time consuming process, requiring an iterative process. This iterative process includes constantly modifying the OPC model setup or OPC rules to arrive at a desirable OPC model. Typically, this is an intensively manual process, requiring best guesses and estimations. For example, during OPC model iterations, OPC engineers try to guess how to compensate for incompleteness of the OPC model. This is time consuming and prone to errors and/or omissions.
Accordingly, there exists a need in the art to overcome the deficiencies and limitations described hereinabove.